1. Field of the Invention
The present invention relates to an interconnect structure for display device to which a driver is externally attached. The present invention also relates to a projection display apparatus (projection system) in which the interconnect structure is applied to an optical modulation device.
2. Description of the Related Art
In recent years, much attention has been attracted to a reflection-type device capable of realizing reduction in size and high resolution and exhibiting high light use efficiency, and the reflection-type device has been practically used as a display device with a progress in higher resolution, smaller size and higher luminance of the projection system. The reflection-type device implies an active type reflective liquid crystal display device which includes a glass substrate on which transparent electrodes are formed facing a drive substrate formed of a silicon substrate on which a CMOS semiconductor circuit is formed, with liquid crystal being injected between the two substrates. Pixel electrodes are placed on the drive substrate in a matrix form for reflecting light and applying voltages to the liquid crystal. The pixel electrode generally includes a metallic material containing aluminum as a major component that is used for LSI processing.
In the reflective liquid crystal display device, a potential difference is generated between a transparent electrode and a pixel electrode by writing display data (signal voltages) in the pixel electrode so that the voltage is applied to the liquid crystal. At this point, optical properties of the liquid crystal vary with the potential difference between the electrodes, and luminance of the liquid crystal is changed by modulating the incident light. Generally, writing in the pixel electrode is performed sequentially from any one of four corners in the display region by controlling a switching element on a pixel drive circuit located at an intersection of a gate line in a row direction and a data line in a column direction.
A driver IC that generates display data is externally attached to the reflective liquid crystal display device for reducing size of the projection system. Further, the display data are supplied from the driver IC through a flexible print circuit (FPC).
The signal voltage written in the pixel electrode is retained by an auxiliary capacity in the pixel drive circuit for one frame (e.g., for approximately 16.7 ms) until next writing begins. Further, since applying the DC voltage to the liquid crystal may deteriorate the device, the equal amount of plus or minus voltage is alternately applied to the liquid crystal for each frame. An organic or inorganic material is used for an alignment layer in the reflective liquid crystal display devices. Higher luminance, higher resolution and higher definition have been expected to be realized in the reflective liquid crystal display device and the projection system using this reflective liquid crystal display device.
In this type of a reflective liquid crystal display device, the display data supplied from the driver IC through the flexible print circuit have been transmitted to and written in the pixel electrodes with an original arrangement (e.g., see Japanese Unexamined Patent Publication No. 2005-189758, paragraph numbers [0008] to [0016], [0052] to [0058], FIG. 9, FIG. 1).
The transmission of the display device in the related art shall be described by referring to a reflective liquid crystal display device with a dot sequential drive system as an example. In the dot sequential drive system, adjacent n pixels as a unit on a gate line are sequentially written by sequentially supplying the display data to n line(s) of data lines (n is an integer of one or two or more) while scanning the gate lines per line. When completing writing in the final row of the data lines, writing is repeated in the similar order while scanning the next line of the gate lines.
FIG. 1 is a diagram showing one example of an interconnect structure for a reflective liquid crystal display device with a dot sequential drive system in the related art. In the reflective liquid crystal display device, gate lines X in the row direction and data lines Y in the column direction are arranged in a matrix form on a drive substrate 71 and a pixel (pixel drive circuit and pixel electrode) P is disposed at an intersection of the gate line X and data line Y.
The external driver IC 61 is provided with a substrate 62 other than that used in the reflective liquid crystal display device. The substrate 62 is connected with the drive substrate 71 in the reflective liquid crystal display device via the FPC (Flexible Print Circuit) 51. Display data D1 to D5 (signal voltage), each with five pixels, are respectively outputted from the output terminals 61a to 61e of the driver IC 61. The display data D1 to D5 are transmitted to the FPC 51 via five signal lines 62a to 62e formed on the substrate 62 and supplied to the drive substrate 71 via five signal lines 51a to 51e disposed in parallel in the FPC 51.
The control signal C is supplied from an external timing control circuit to the drive substrate 71 via the FPC (Flexible Print Circuit) 51 (not shown).
Five signal lines 71a to 71e are formed on the drive substrate 71 for transmitting the display data D1 to D5 supplied to the drive substrate 71. The signal lines 71 to 71e are disposed in parallel and the display data D1 to D5 are transmitted to the data line driver 73 with the same arrangement of the signal lines 51a to 51e of the FPC 51. All the display data D1 to D5 are supplied to the four respective change-over switches 74 to 77 in the data line driver 73.
The control signal C supplied to the drive substrate 71 is supplied to the gate line driver 79 and the data line driver 73.
The gate line driver 79 scans the gate line X based on the control signal C. In the data line drivers 73, the switching control circuit 78 controls the change-over switches 74 to 77 based on the control signal C.
As indicated by an arrow in the figure, the following shows operations of the dot sequential drive system in a case where the gate lines X are scanned from the lower end to the upper end in the display region, and the data lines Y are switched from the right end to left end in the display region.
First, the display data D1 to D5 are supplied to the five data lines Y at the right side by switching on the change-over switch 77 alone using the switching control circuit 78 in the data line driver 73 while the gate line driver 79 scans the lowest row of the gate line X. Thus, the adjacent five pixels P at the right side in the lowest row are written.
Subsequently, the display data D1 to D5 are supplied to the five data lines Y at the slightly right side of the center by switching on the change-over switch 76 alone using the switching control circuit 78 in the data line driver 73 while the gate line driver 79 scans the lowest row of the gate lines. Thus, the adjacent five pixels P at the slightly right side of the center in the lowest row are written.
The display data D1 to D5 are supplied to the five data lines Y at the slightly left side of the center by switching on the change-over switch 75 alone using the switching control circuit 78 in the data line driver 73 while the gate line driver 79 scans the lowest row of the gate lines. Thus, the adjacent five pixels P at the slightly left side of the center in the lowest row are written.
The display data D1 to D5 are supplied to the five data lines Y at the left side by switching on the change-over switch 74 alone using the switching control circuit 78 in the data line driver 73 while the gate line driver 79 scans the lowest row of the gate lines. Thus, the adjacent five pixels P at the left side in the lowest row are written.
Subsequent to writing the pixels in the lowest row, the gate line in the second from the lowest row is scanned in the similar order. Writing is repeated in the similar order while scanning the gate lines per line in the upper direction.